On the algebraic reuse of hardware design

Abstract

The widespread use of computers in a diversity of activities today demands complex computational systems to be produced efficiently. This factor has led to a requirement for new methods and techniques to enhance controllability, quality and productivity of systems. Reusability is recognized as a basic principle for enhancing productivity and quality of engineering products. Additionally, formal development of software/hardware has emerged as an approach to ensure quality and help handle the complexity of description of such systems. So, for reasons of economy, productivity, quality and time to market, it is highly desirable to formally reuse hardware/software components. This paper presents a foundation for formal reuse of synchronous processes using a process algebra (EPA [2]). Assuming the existence of a library of formally verified components, we propose to make effective reuse of these existing elements when creating new systems. The strategy used here is to formally create an interface element with which a library process is composed in order to implement the desired component. In doing so, the verification task of the whole system is reduced to verifying the interface element.